AP FPGA and Validation Engineer
三星半导体(中国)研究开发有限公司
- 公司规模:150-500人
- 公司性质:外资(非欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2013-10-17
- 工作地点:杭州
- 招聘人数:10
- 学历要求:本科
- 语言要求:英语
- 职位类别:IC验证工程师
职位描述
Scope of responsibilities:
* Develop pre-silicon verification plan, create C test patterns and perform FPGA verification for SoC design before tapeout.
* Develop silicon validation plan, create C test cases and applications, and perform silicon validation.and electrical characteristics tests for SoC chips.
* Work closely with the PE/TE for product pattern development and support mass production of silicon products.
* Define FPGA prototyping H/W system and silicon EVA board, support the HW team on board design and bring-up of H/W board.
* For senior position, he/she will also be responsible for porting SoC design into FPGA including doing partition into multiple FPGAs for large SoC design, perform FPGA implementation, i.e. RTL coding/change, simulation, synthesis, P&R and config bitstream generation.
* For very senior position, he will be responsible for mapping SoC design into HW emulation system, like Palladium, compile and run through the test cases to bring-up the complex palladium platform.
* The verification/validation can be done on module-level, scenario and some performance tests, so a good understanding of module/IP, chip and the whole SoC system is required, he/she will work closely with the design team, HW team and SW team and act as the main interface for talk between those functional teams.
Requirements:
*
* Good HW test and validation experience on the complex embedded system based on MCU/DSP/MPU and/or FPGA.
* Good knowledge of MCU/DSP architecture and experiences in C/ASM programming and debug.
Experience with ARM-based SoC programming and debug tools will be a plus.
* Proficiency in using lab equipments & tools, eg. Logic Analyzer, Oscilloscope, measurement equipments and debugging tools.
* Strong debugging and problem solving skills with the ability in quick learning and independent work.
* For board designer, hands on experience in component selection, schematics and PCB design is required,
experience on the high speed design, signal integrity will a plus.
* For FPGA designer, good experience on FPGA prototyping development based on Xilinx or Altera is required,
this means he/she has hands-on-experience in Verilog/VHDL design, simulation and FPGA implementation.
Experience on doing FPGA partition for large ASIC/SoC design and achieving high frequency performance for complex and large design will be a plus.
* Knowledge of SoC design & verification methodology will be a plus
* Knowledge or experience in complex HW/SW system development based on CPU/FPGA will be a big plus, eg. multimedia or wireless communication application.
* Knowledge or experience in Palladium emulation system will be a big plus.
公司介绍
杭州&北京&深圳研究所的主要业务是底层软硬件、系统解决方案开发和PDDI芯片设计。其中,Solution开发部门负责软硬件及其系统开发,针对智能移动设备和NFC产品提供完整的参考解决方案设计,对重点客户提供技术支持。PDDI 部门主要致力于大尺寸液晶面板驱动芯片的开发与技术研究,产品主要应用于高清、超高清液晶电视。凭借多年的自主研发能力,为客户提供高性能、低能耗的优质产品。
苏州研究所是三星半导体在海外设立的一个半导体封装技术研究所,主要致力于Memory及LSI封装产品的开发与技术研究。主要开发产品包括BOC,MCP,Flip Chip,SSD等Memory产品以及DIP,QFP, COB 等ASIC和智能卡产品。在多层堆叠封装技术开发以及新型高性能低成本的封装材料的开发上具有卓越的实力。
立足中国,面向世界, 三星半导体中国研发中心的目标是成为韩国三星半导体在海外最重要的、技术一流的研发中心,为中国市场提供有竞争力的Total System Solution。
我们现招聘优秀人才,重点从事嵌入式系统底层驱动程序开发、上层应用程序开发,材料,封装产品研发等工作,针对中国市场提供有竞争力的芯片及整体解决方案。
我们提供一流的R&D课题和发展机会,欢迎富有激情、敢于梦想的你和Samsung一起快速成长!
三星半导体(中国)研究开发有限公司杭州分公司
地址:浙江省杭州市滨江区滨安路1190号智汇领地(DIC)A幢24~26F
邮政编码:310052
电话:(571)8672 6288
传真:(571)8672 6290
三星半导体(中国)研究开发有限公司
地址:江苏省苏州工业园区凤里街337号
邮政编码:215021
电话:(512)6288 8288
传真:(512)6288 8388
三星半导体(中国)研究开发有限公司北京分公司
地址:北京市朝阳区冠捷大厦8楼
邮政编码:100022
电话:(10)6566 8100
三星半导体(中国)研究开发有限公司深圳研发分公司
地址:深圳市南山区海德一道88号中洲控股金融中心A楼10楼 邮政编码:518000
电话:(0755)86085991
联系方式
- Email:ssc.sscr@samsung.com
- 公司地址:浙江省杭州市滨江区滨安路1190号智汇领地(DIC)A幢24~26F
- 电话:17767135485