北京招聘

The Role:

AMD System Management Unit(SMU) IP team delivers differentiated system management IP for all AMD products. You'll be working with the global team on complicated clock scheme, security processing, network on chip, power management, etc.

RESPONSIBILITIES:

The successful candidate will assume technical leadership of a complex design generally including custom digital logic, an embedded u-controller and analog functionality. The following is a list of key responsibilities that the candidate will assume:

Responsbile for architecture and micro-architecture definition

Digital design and RTL coding.

Co-ordinating design verification activities.

Co-ordinating front-end and physical implementation activities

REQUIREMENTS:

Minimum 5-6 years of experience with Verilog a MUST

Excellent knowledge of verilog, C, C++ and a scripting language; experience with Perl and TCL is a plus

Experience with low level, physical phenomena oriented logic design is an asset (dealing with IO, clocking, voltage control, DFT, etc.)

Power/thermal management experience is an asset.

Experience in industry standard IO IPs - SPI/I2C/SMBUS/USB/PCIE is a big plus

Embedded micro-processor experience is a plus

Security/cryptography experience is an asset

Strong analytical/problem solving skills and pronounced attention to details.

Must be a self starter, and able to independently drive tasks to completion.

Strong interpersonal and communication skills

EDUCATION:

Bachelor, Master's or PhD degree in Electrical or Computer engineering.

AMD公司成立于1969年，总部位于美国加利福尼亚州桑尼维尔。AMD（NYSE: AMD）是一家创新的科技公司，致力于与客户及合作伙伴紧密合作，开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球，拥有约为12000名员工。