北京招聘

THE ROLE:
? Work with global Front-End design team for large scale ASIC chip verification
? Work on low power verification tasks including Clock Gating/Power Gating DV

THE PERSON:
? Must have good communication & Analytical thinking skills
? Must be self-motivated

KEY RESPONSIBILITIES:
? Understand the architecture of the graphics IP and functional block being designed
? Build C/C++ model for simulation
? Build test bench and monitors for DUT
? Compose test plan and validation vectors to ensure functional completeness
? Debug low power related function bugs of graphics IP

PREFERRED EXPERIENCE:
? Have in depth knowledge of entire design process from Design specification, defining
architecture, micro-architecture, RTL design and functional verification, synthesis,
Physical Design, Timing closure, Tape-out, and post-Si debug.
? Have hands-on experience in Chiplevel Design/Integration activities.
? Some exposure to DFT is a strong plus.
? Should be able to work closely with RTL Designers and Backend Physical Design teams
across multiple sites.
? Should have proficiency in flow development and scripting.
? Knowledge of low power design/verification is a big plus

ACADEMIC CREDENTIALS:
? Master with at least 10 years or Bachelor with at least 13 years working experience in
ASIC area

LOCATION:

? Shanghai

AMD公司成立于1969年，总部位于美国加利福尼亚州桑尼维尔。AMD（NYSE: AMD）是一家创新的科技公司，致力于与客户及合作伙伴紧密合作，开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球，拥有约为12000名员工。