Senior Digital Verification Engineer
恩智浦(中国)管理有限公司
- 公司规模:10000人以上
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2020-10-11
- 工作地点:上海-浦东新区
- 招聘人数:若干人
- 工作经验:2年经验
- 学历要求:本科
- 职位类别:其他
职位描述
Digital IP Design/Verification Engineer
Responsibility:
- You will be responsible for digital IP and subsystem level verification;
- Create verification plans with designers;
- Develop DV architecture and verification environment;
- Verification execution and sign-off;
- Interface to HW and SW design teams, as well as to architecture and system engineering teams, to understand functionality and application of the IP subsystem / SoC / system.
Requirements:
- Master of communication / Electronics / computer related major
- Solid background with ASIC design verification flow and multiple ASIC tape out experience
- Complex IP/ASIC/SOC design verification background, direct experience in IP/SOC or Industry bus standard (Display, HDMI, DP, MIPI or high speed IO interface)
- Familiar with SystemVerilog/UVM for testbench creation, debug, reuse, constrained-random stimulus and functional coverage;
- Solid knowledge on SystemVerilog, C/C++, Verilog
- Solid background with hardware verification methodologies such as coverage-based verification methodology with the use of hardware assertions (PSL or SVA)
- Good communication skills and team work
- Good oral and written English skills
职能类别:其他
公司介绍
NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has over 29,000 employees in more than 30 countries and posted revenue of $8.88 billion in 2019.
联系方式
- Email:fiona.chen@nxp.com
- 公司地址:西青开发区兴华路15号