北京招聘

Job Responsibilities：

• Backend Implementation (RTL to GDS): constraints definition, logic/physical synthesis, clock tree analysis, floor-planning, power planning, CTS, place and route, STA, signal integrity, timing closure, formal verification;
• Running Digital Backend/Mixed Signal Design Flow using Cadence or Synopsis tool suites;
• Chip tape-outs on advanced technology nodes (below 65nm).

Qualifications：

• At least 8 years of relevant experience;
• Deep knowledge and experience in constraints definition, logic/physical synthesis, clock tree analysis, floor-planning, power planning, CTS, place and route, STA, signal integrity, timing closure, formal verification;
• Strong experience with Cadence or Synopsys tool suites (preferably both);
• Experience with multiple chip tape-outs on advanced technology nodes (below 22nm);
• Scripting experience;
• At least M.Sc. degree in Electronics Engineering;
• Experience leading a team is a big plus;
• Fluent English.

成立于2019年12月，总部位于中国苏州；
我们的产品是车规级处理器芯片，主要应用于汽车电子各应用领域，包含车身电子，动力系统与底盘控制，仪表盘与信息娱乐系统，汽车网关等，以及高可靠性要求的工业控制领域；
核心团队来自世界知名汽车半导体公司，拥有完整的汽车MCU产品定义、芯片研发、软件及方案开发、市场营销20年实践经验；
致力于为实现车规芯片国产化做出大的贡献。


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考勤：弹性考勤
电话：+86 512 65008818
城市：合肥/苏州/南京/上海/天津

智芯半导体，真挚邀请优秀的您加入！