北京招聘

Responsibilities

• Understand RTL design specification and verification plan

• Develop verification testbench components and stimulus

• Analyze and conclude root cause for issues and failures

• Implement new flows and methodologies

 

Requirements

• Bachelor or master’s degree in Microelectronics, Computer Science or relevant disciplines

• Good knowledge on typical IC design flow

• Good knowledge on Verilog, C/C++ and scripting languages (Perl, Python, etc.)

• Experience on using simulator (VCS/Questasim/IUS) and debug tool (Verdi)

恩智浦半导体（纳斯达克代码：NXPI）致力于通过先进的安全连结及基础设施解决方案为人们更智慧安全、轻松便捷的生活保驾护航。作为全球领先的嵌入式应用安全连接解决方案领导者，恩智浦不断推动着互联汽车、端对端安全及隐私、智能互联解决方案市场的创新。恩智浦拥有超过60年的专业技术及经验，拥有29,000名员工，业务遍及30多个国家，2019年的营业额达88.8亿美元。