北京招聘

Responsibilities

• FPGA simulation and verification strategy planning and architecture design
• Feature point extraction and test case planning and design and debugging, Function coverage analyzing;
• Documentation for related tasks also is responsible for document review, code inspection and other
• Tasks required by quality process.
• Capability to drive strategic technical leadership
• Drive continuous improvements of products and processes
• Develop/support team competence set up in technical domain

Qualifications & Requirements

• More than 2 years working experience on FPGA/ASIC verification in Telecommunication product field
• Good at C/C++ design, good understanding of OOP
• Knowledge of System Verilog is a must
• Knowledge and experience of FPGA design is preferred
• Knowledge on verification methodology, OVM, UVM
• Be familiar with standard protocol and interfaces and IO standards, PCI, PCI-e, Local bus, SERDES, CPRI, I2C, SGMII, Flash/SDRAM
• Good sense of co-working with team members under CVS/ClearCase like source control environments
• Knowledge of Linux environment working capable and script/Shell
• Be familiar with EDA tools such as Incisive, VCS, ModelSim and so on
• Knowledge of Perl, shell, makefile script language is a plus.
• Working with people and networking
• Innovating, adapting and responding to change
• Delivering results and meeting customer expectations
• Planning and Organizing

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