Manager Silicon Design Verification Engineer
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-11-28
- 工作地点:上海-浦东新区
- 招聘人数:1人
- 工作经验:无工作经验
- 学历要求:招1人
- 语言要求:不限
- 职位月薪:3.8-4.5万/月
- 职位类别:IC验证工程师 集成电路IC设计/应用工程师
职位描述
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
Manager Silicon Design Verification Engineer
THE ROLE:
AMD NBIO (North Bridge IO) team delivers industry leading high-performance interconnects IP subsystem for all AMD products including dGPU, APU, Server and Game consoles, NBIO subsystem provides PCIe connectivity to external devices as well as AXI-based IPs. NBIO global team operates seamless from China, North America and Europe.
NBIO subsystem team are expanding, we are looking for a NBIO subsystem DV manager based in Shanghai. He/she is responsible for managing NBIO subsystem DV team, co-work closely with global NBIO subsystem DV team, develop and verify NBIO subsystem.
THE PERSON:
Candidate will manage a DV team with more than 15 team members, need to have solid DV background and more than 2 years’ team management experience, fluent spoken English and very good communication skill in both English and Chinese.
KEY RESPONSIBILITIES:
- Strategic team development plan
- Talent recruit and internal talent grow
- Inspiring innovation
- Project execution tracking and signoff
· NBIO subsystem schedule negotiation
· Global communication and alignment.
· Team performance management
· Short term global travel upon business need
PREFERRED EXPERIENCE:
ACADEMIC CREDENTIALS:
MSEE with minimum of 8 years, or BSEE with minimum of 10 years’ experience in digital ASIC/SOC design verification
LOCATION:
Shanghai
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦