北京招聘

Description:

? Work with the global design teams to do complex SOC verification for digital/analog design. 

? block level verification based on SystemVerilog&UVM methodology for the complex new IP design.

? Responsible for verification plan quality, verification result/design target cross-check, test case development to have better coverage and verification quality. Co-work with functional verification team to ensure the complex SoC verification functional coverage and quality

Requirements:

? Bachelor or master’s degree in Microelectronics, Electronics, Electronic Engineering, Computer Science or relevant disciplines

? Good knowledge and experience in C/C++/Verilog/System Verilog/UVM programming languages, familiar with IC simulation&debug flow and tools,testbench build, unix/linux environment, tcl/perl script etc.

? Good Knowledge of computer architecture, especially ARM CPU(Cortex A/M series), bus protocols(APB/AHB/AXI), verification experience of ARM-based SoC is a plus

恩智浦半导体（纳斯达克代码：NXPI）致力于通过先进的安全连结及基础设施解决方案为人们更智慧安全、轻松便捷的生活保驾护航。作为全球领先的嵌入式应用安全连接解决方案领导者，恩智浦不断推动着互联汽车、端对端安全及隐私、智能互联解决方案市场的创新。恩智浦拥有超过60年的专业技术及经验，拥有29,000名员工，业务遍及30多个国家，2019年的营业额达88.8亿美元。