北京招聘

Responsibilities:

? Understanding the expected functionality of designs.

? Developing testing and regression plans.

? Designing and developing verification environment.

? Running RTL, gate-level and AMS simulations/regression.

? Code/functional coverage development, analysis and closure.

Requirements:

? MS in EE/CS/ME.

? Minimum of 2 years’ experience.

? Additional qualifications include: Good IC verification skills and basic knowledge of logic and circuit design, good communication and problem solving skills.

? Candidate should be familiar with as System Verilog, UVM verification methodology.

? Candidate should be familiar with industry standard ASIC design and verification tools and flow.

? Good knowledge ddr protocol and computer system architecture would be an added advantage.

? Good knowledge of Perl and shell programming would be an added advantage.

? Design verification experience (test plan, test bench, assertions, debugging designs, code coverage etc.).

? Knowledge in ASIC/FPGA design process and verification tools.

? Familiar with design and verification languages (Verilog, System Verilog, SVA etc.).

? Scripting and automation skills (tcl, perl, makefile etc) a plus.

? Familiar with C/C++.

? Knowledge of DDR protocol a plus.

? Independent and self-managing.

公司成立于2011年11月，是一家国内合资的有限责任公司；我们主要从事办公设备的销售、租赁与维修，提供办公自动化服务(OA)：涵盖理光、理想、京瓷、兄弟、富士施乐、利盟、惠普、佳能等著名品牌的速印机、彩印机、打印机、传真机、一体机等办公设备，同时又开拓影音器材、IT数码等新领域的业务来进一步完善办公事业。