上海招聘IP Design Verification Engineer

IP Design Verification Engineer

超威半导体（中国）有限公司

公司规模：1000-5000人
公司性质：外资(欧美)
公司行业：电子技术/半导体/集成电路

职位信息

发布日期：2019-11-28
工作地点：上海-浦东新区
招聘人数：1人
工作经验：无工作经验
学历要求：本科
职位月薪：2.2-3.3万/月
职位类别：集成电路IC设计/应用工程师 IC验证工程师

职位描述

Job Summary:

· Long lead interconnection IP Shim/Container/Combo-Whacker level test-bench building, test-case debugging.

· Ethernet IP test-bench maintenance and updating, to support new feature.

· Long lead interconnection IP and Ethernet IP validation support.

· Verification environment efficiency improvement.

Job Responsibilities:

· Participate long lead interconnection IP specification review, test-plan development, test-bench building, test-case debugging and RTL bug tracking.

· Support IP to SoC level integration, support Combo-Whacker level test-bench and test-case develop.

· Co-work with Architect team and DE team to deliver IP@SoC milestones on time with good quality.

Job Requirements:

· The candidate is preferred to be EE/CS of related MSEE with minimum 6 years, or BSEE with minimum 8 years of ASIC/SoC verification experience.

· Strong RTL coding with Verilog, test-bench coding with SystemVerilog.

· Good knowledge of design verification methodology, familiar with UVM/OVM/VMM.

· Deep understanding of ASIC/SoC design and verification flow.

· Have at least two kinds of following knowledge: 802.3 Ethernet Protocol, PCI-Express, PHY, AMBA AXI/AHB/APB.

· Have low power or power aware experience is a strong plus.

· Be good at script language, such as Perl, Python, Ruby, C Shell, Makefile.

· Be good at both speaking and written English.

· Be good at communication and teamwork, self-motivated and with good work ethics

职能类别：集成电路IC设计/应用工程师 IC验证工程师

公司介绍

AMD公司成立于1969年，总部位于美国加利福尼亚州桑尼维尔。AMD（NYSE: AMD）是一家创新的科技公司，致力于与客户及合作伙伴紧密合作，开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球，拥有约为12000名员工。

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