clock physical design engineer
英伟达半导体科技（上海）有限公司
- 公司性质：外资(欧美)
- 公司行业：电子技术/半导体/集成电路
职位信息
- 发布日期：2012-11-09
- 工作地点：上海-浦东新区
- 招聘人数：若干
- 工作经验：三年以上
- 学历要求：本科
- 语言要求：英语良好
- 职位类别：集成电路IC设计/应用工程师
职位描述
nVidia's products have the most complex clock design embedded. Clock team is providing end-to-end solution of clock to both GPU and mobile chips. We are looking for engineers who have both talent and passion.
clock physical design engineer
Job Description:
As a clock physical design engineer, your work is to build and optimize clock physical structure and clock generation logic in the state-of-the-art GPU chip and low power application processor. Your responsibilities are:
Setup and develop STA flow to time high performance customized clock generation circuit;
Work closely with logic designer to setup timing sign-off constraints for special high frequency circuit;
Work closely with layout team to get a high quality physical implementation of clock generation logic;
Participating in building complex physical clock structure with high performance and power requirement;
Participating in designing and optimization of high performance customized clock generation circuit (including power and speed);
Developing tools to improve work efficiency.
Requirement
BSEE or MSEE with 3+ STA work experience;
Experience in synthesis/timing analysis tools and knowledge in Verilog HDL;
Experience in clock related physical design work is plus(CTS, full chip clock distribution work);
Proactive, open minded, strong problem solving skills;
Good communication skills;
Good English;
Familiar with Linux/Unix environment;
Programming skills in Perl/tcl.
clock physical design engineer
Job Description:
As a clock physical design engineer, your work is to build and optimize clock physical structure and clock generation logic in the state-of-the-art GPU chip and low power application processor. Your responsibilities are:
Setup and develop STA flow to time high performance customized clock generation circuit;
Work closely with logic designer to setup timing sign-off constraints for special high frequency circuit;
Work closely with layout team to get a high quality physical implementation of clock generation logic;
Participating in building complex physical clock structure with high performance and power requirement;
Participating in designing and optimization of high performance customized clock generation circuit (including power and speed);
Developing tools to improve work efficiency.
Requirement
BSEE or MSEE with 3+ STA work experience;
Experience in synthesis/timing analysis tools and knowledge in Verilog HDL;
Experience in clock related physical design work is plus(CTS, full chip clock distribution work);
Proactive, open minded, strong problem solving skills;
Good communication skills;
Good English;
Familiar with Linux/Unix environment;
Programming skills in Perl/tcl.
公司介绍
NVIDIA—AI计算公司中的领导者
我们定义了现代计算机图形
我们拥有世界第 一大游戏平台GEFORCE
我们助力世界上运行速度最快的超级计算机
1999年，从行业第 一个图形处理单元（GPU）GeForce 256开始，我们始终深耕技术，寻求创新和突破。最新的NVIDIA A100 GPU更是搭载全球***的7纳米处理器NVIDIA Ampere GPU架构问世，实现了迄今为止***的GPU性能飞跃。
这是每一位NVIDIA工程师的匠人之心。
我们从图形计算起航，拥抱AI和加速计算的浪潮，为当代达·芬奇和爱因斯坦打造专属计算机，帮助他们看见并创造未来。
这是NVIDIA工程师团队开辟的创新之路。
我们看到超级计算的适用范围正在迅速扩展，未来全球信息经济的重心将从服务器转移到新型的强大且灵活的数据中心。以数据中心为计算单元的新时代已经来临。
我们感知到身边越来越多的事物可以是智能的、云连接的，并且基于一个可以为几乎每个行业构建富有想象力的服务的平台。万物智能的变革已经开始。
我们已经开始加速从芯片到CPU和GPU的连接方式，更希望与你一起将其推及至整个软件堆栈，最终实现跨数据中心的性能提升。
加入我们！让我们一起推动高性能计算的下一个时代，让我们在关乎世界却只有我们能把握的棘手新机遇中并肩前行！
我们定义了现代计算机图形
我们拥有世界第 一大游戏平台GEFORCE
我们助力世界上运行速度最快的超级计算机
1999年，从行业第 一个图形处理单元（GPU）GeForce 256开始，我们始终深耕技术，寻求创新和突破。最新的NVIDIA A100 GPU更是搭载全球***的7纳米处理器NVIDIA Ampere GPU架构问世，实现了迄今为止***的GPU性能飞跃。
这是每一位NVIDIA工程师的匠人之心。
我们从图形计算起航，拥抱AI和加速计算的浪潮，为当代达·芬奇和爱因斯坦打造专属计算机，帮助他们看见并创造未来。
这是NVIDIA工程师团队开辟的创新之路。
我们看到超级计算的适用范围正在迅速扩展，未来全球信息经济的重心将从服务器转移到新型的强大且灵活的数据中心。以数据中心为计算单元的新时代已经来临。
我们感知到身边越来越多的事物可以是智能的、云连接的，并且基于一个可以为几乎每个行业构建富有想象力的服务的平台。万物智能的变革已经开始。
我们已经开始加速从芯片到CPU和GPU的连接方式，更希望与你一起将其推及至整个软件堆栈，最终实现跨数据中心的性能提升。
加入我们！让我们一起推动高性能计算的下一个时代，让我们在关乎世界却只有我们能把握的棘手新机遇中并肩前行！