北京招聘

Responsibilities：

? Implement Netlist-to-GDS design flow (including floorplan, placement, timing optimization, clock tree synthesis and routing)

? Supports STA timing analysis and SI fixing

? Physical verification (including DRC, LVS, IR drop and DFM analysis and signoff)

? Responsible for the low-power physical P&R design process

? Finish PPA evaluation of core modules and subsystems, including harden and optimization

Qualifications:

? More than 5 years of experience in physical design, bachelor or above

? Familiar with the SoC/chip design flow from Netlist to GDS;

? 3+ projects of physical design successful story as a team member;

? Familiar with the EDA tools of mainstream vendor, Able to complete PR work and design optimization independently

? Experience in low power design methodology for SoC

? Self-driven and team-work spirit, strong verbal and written communication skills in Chinese and English.

Big Plus：

? Project experience of hierarchical implementation with physical design team

? Experience in scripts programming with Shell/TCL/Perl/Python or other language.

? Familiar with DFT methodology and flow

? Experience in Customer Layout/Physical design for analog circuit

  

StarFive是基于免费且开放的RISC-V指令集架构的商业化处理器核心IP、开发工具和芯片解决方案的领导者。 在RISC-V开创者和业内资深专家组成的团队领导下，StarFive帮助SoC设计人员缩短产品上市时间，以及通过定制的开放式架构处理器内核降低成本，同时，使系统设计人员能够构建基于RISC-V的定制半导体，从而实现芯片优化。

上海赛昉科技有限公司成立于2018年8月24日，公司基于RISC-V的开源生态并在RISC-V开创者和业内资深专家组成的团队领导下，利用领先的RISC-V内核定制技术和敏捷设计方法，成为具有国内自主可控，有龙头作用的RISC-V解决方案提供商；同时利用自主知识产权针对AI-IOT的关键应用领域，通过平台化、模板化的设计理念，实现垂直领域的核心技术整合，提供相关领域的系列化芯片及其解决方案，创造一种新的商业模式，成为对应领域的技术主导者和芯片与方案的主流供应商。