IP Design Verification Engineer
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-02-23
- 工作地点:上海-浦东新区
- 招聘人数:若干人
- 工作经验:无工作经验
- 学历要求:本科
- 职位月薪:3-4万/月
- 职位类别:IC验证工程师
职位描述
Job Responsibilities:
AMD NBIO (North Bridge IO) team delivers industry leading high performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. You'll be working with the global team on NBIO subsystem level verification, and provide deployment support to various global SOC teams
Responsibility:
* Work with architecture/IP designers to get a full deep insight on the design under test
* Subsystem level test plan development and SOC test plan consultant
* Subsystem level test bench setup/maintain, methodology deployment, verification component create/maintain
* Test case create/triage to ensure complete coverage
* Deploy NBIO or provide technical consult support to SOC teams
Experience: Complex IP/ASIC/SOC Design Verification, direct experience in IP/SOC or Processor (CPU or GPU) or Industry bus standard (PCI-e, HT, USB, DDR, DisplayPort) or multimedia/video is preferred.Good knowledge of SystemVerilog and OVM is a plus.Good knowledge of Verilog/C/C++/System C/SystemVerilog.Verification insights into random techniques.Verification of large scale ASICs.Experience in power verification is an asset.Verification of Virtualization Components is an asset.Strong C and C++ software development and scripting languages (Perl, C Shell, Makefile, …) experience.Solid background with hardware verification methodologies such as coverage-based verification methodology with the use of hardware assertions (PSL or SVA).
职能类别: IC验证工程师
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦