MTS/Sr. ASIC simulation analysis/software engineer (职位编号:NZ)
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-03-29
- 工作地点:上海-浦东新区
- 招聘人数:1人
- 工作经验:5-7年经验
- 学历要求:本科
- 职位月薪:2-3万/月
- 职位类别:IC验证工程师 其他
职位描述
Job description:
- Co-Work with World Wide Performance analysis and Design Team- In post-silicon:
1. Work with SW/HW team to analyze the benchmark/Game performance
2. Check/Optimize chip setting for better performance
3. Performance compare/analysis with the competitors’
4. Develop performance analysis/model tools for post-silicon workflow
5. Performance analysis for each rendering algorithm in game/benchmark
6. Research new GPU architecture to improve performance
- In pre-silicon:
1. Simulate rendering algorithm on RTL model to research/analyze performance issue on new GPU architecture
write demo performance case based on algorithm analysis result
Minimum requirement:
- Proficient in English read/write/speaking/listening
- Must at least meet 1 condition below:
1. Master in Computer Science, Engineering, Mathematics, Physics, EE
2. Bachelor (with 2.5+ years’ experience) in Computer Science, Engineering, Mathematics, Physics, EE
3. Bachelor with 2+ years’ experience on Graphics/GPU/GPGPU related field with relevant industry experience required.
- Must at least meet 1 condition below:
1. 3+ years of project experience on python/perl
2. 2.5+ years of project experience on C/C++
3. any experience with OpenGL/DirectX3D/GPGPU (driver/shader compiler or game engine... develop/debug work experience) (high recommended)
4. 6+ years of experience on linux shell
5. project experience with device drivers or compiler(graphics, networking) (high recommended)
6. 4+ years of embedded HW design
7. any research or develop experience related to GameEngine/Renderman/MentalRay/GI renderer (high recommended)
8. >=2.5 years of HW verification or design experience(ASIC or FPGA), familiar with RTL design or timing analysis (high recommended)
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦