SMTS Design Verification Engineer (职位编号:NZ)
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-03-29
- 工作地点:上海-浦东新区
- 招聘人数:2人
- 工作经验:10年以上经验
- 学历要求:本科
- 职位月薪:1.8-3万/月
- 职位类别:IC验证工程师 集成电路IC设计/应用工程师
职位描述
Job description:
We are currently looking for engineer who will be responsible for design verification of cutting edge GPU projects. Qualified candidate will participate in and lead Graphics Cache Sub-System function design and verification domains including:
- Responsible for AMD Graphics Cache Sub-System RTL design implementation, and participate in the architecture level discussion and decision making.
- Working with the Front-end team and PD team closely on the ASIC implementation flow for the Cache Sub-System including Synthesis, Timing, DFT, Power, Floorplan and sign-off activities.
- Working with Verification engineer closely on functional and performance verification.
4. Supporting integration and qualification of SOC integration.
Requirement:
- MS with 10+ or BS with 12+ years' experience in ASIC/SoC design verification
- Strong Verilog RTL coding capability is a must.
- Hand-on experience in all domains of complex ASIC Implementation flow.
- Good understanding of the verification, experience in verification work is an strong asset.
- Familiar with scripting languages like Ruby/Perl/Makefile…
- Strong problem solving and communication skills
- Knowledge on computer architecture and Cache system is highly preferred.
职能类别: IC验证工程师 集成电路IC设计/应用工程师
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦