Principal / Senior Digital IC Design Engineer
戴泺格半导体(深圳)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2018-04-13
- 工作地点:北京-海淀区
- 工作经验:5-7年经验
- 学历要求:硕士
- 语言要求:英语良好
- 职位月薪:1.5-3万/月
- 职位类别:集成电路IC设计/应用工程师
职位描述
About Us
Dialog Semiconductor creates highly integrated, mixed-signal integrated circuits (ICs), optimised for personal portable, low energy short-range wireless, LED solid state lighting and automotive applications. The company provides flexible and dynamic support, world-class innovation and the assurance of dealing with an established business partner.
With its focus and expertise in energy-efficient system power management and a technology portfolio that also includes audio, short-range wireless, AC/DC power conversion and multi-touch, Dialog brings decades of experience to the rapid development of ICs for personal portable and digital consumers applications, including smartphones, tablets, Ultrabooks? and digital cordless phones.
What we can offer
We have a fantastic opportunity for a Senior Test Engineer to join our award-winning and rapidly growing team at Dialog Semiconductor.
Working as a Senior Test Engineer with Dialog you’ll find yourself in a truly international environment where your skills and experience are recognised, rewarded and challenged on a daily basis, as well as have access to a variety of internal and external training opportunities to help you develop your career and reach your full potential. In addition we are committed to supporting the health and wellbeing of our employees, offering the chance to participate in pension and medical plans (where local culture and practice supports this) and a selection of ‘well-being’ initiatives across a number of our locations (e.g. flu vaccination programme and a cycle to work scheme).
The role - Principal / Senior Digital IC Design Engineer (初/中/高级数字芯片设计工程师)
Working in our R&D team in Beijing/ Tianjin, you will be responsible to:
Participate IP and chip level architecture definition, derive functional and design specifications and analyse feasibility of technical and architectures.
Implement design with Verilog to achieve specification goals. Simulate and debug the codes in the coding stage.
Go through the frontend design flow to deliver qualified netlist. Co-work with back-end team to fix timing issue and check floor-plan.
Write ASIC specific part of test plan. Prove functional correctness from block level to top-level.
Design for verification (assertion based design strategies, code coverage, functional coverage, test plan, etc.)
Support firmware/software bring-up and debugging.
Work as the technical contact point on the ASIC area.
- Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency.
What we are looking for
- MSEE or above
- Strong RTL coding and familiar with front-end design flow
- Proven experience on synthesis, timing analysis and formal verification.
- Should be familiar with shell/perl/tcl programming in linux OS.
- Experience in mixed signal team is a plus, knowledge of analog design is a big plus.
- Experience in power management chip design is a plus.
- Experience in C/C++/SystemVerilog programming is a plus
- Good communication skills and fluent English.
- Strong responsibilities and team spirit.
- Candidates from Junior to Principal level are all welcomed.
Join Us!
If you have heard enough to confirm that Dialog is the company for you, click below and apply now!
https://emea3.recruitmentplatform.com/syndicated/private/syd_apply.cfm?ID=PKCFK026203F3VBQB8M7V79J5&nPostingTargetID=14945
职能类别: 集成电路IC设计/应用工程师
关键字: Digital Design Power IC 数字 设计 电源 芯片
公司介绍
Dialog执行稳健,增长快速,并具有强大的现金产生能力;截至2018年12月31日,现金及现金等价物余额为6.78亿美元。全球员工总数达2,100人(工程师约占75%)。
Dialog作为雇主积极承担社会责任,开展各项活动造福员工、社区、其他利益相关方和自然环境。
关键要点
智能手机PMIC市场份额排名***
智能手机RapidCharge?快充电源适配器IC市场份额排名***
可配置混合信号IC(CMIC)市场份额排名***
集成度***,采用可配置电源管理模式的完整系统方法
2017年,我们交付了超过1亿套SmartBond? SoC,创下了里程碑
蓝牙低功耗市场份额排名***,交付了超过1.8亿套具有业内最低功耗的蓝牙芯片。
2018年营收达14.42亿美元
联系方式
- 公司地址:天津经济技术开发区信环西路19号泰达服务外包产业园