Senior Analog/mixed-signal IC design Engineer
贵州华芯通半导体技术有限公司
- 公司规模:150-500人
- 公司性质:合资
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2017-11-22
- 工作地点:上海-浦东新区
- 工作经验:无工作经验
- 学历要求:本科
- 语言要求:英语熟练
- 职位月薪:3-4万/月
- 职位类别:集成电路IC设计/应用工程师
职位描述
职位描述:
Position Description
On this position, you will participate in & lead a team of highly competent Analog designers involved in design, verification, and implementation of advanced platform for HXT's future generation server CPU products.
? Location
Shanghai
? Responsibilities
1. Lead team members to design analog macros independently.
2. Analog/Mixed-signal IP design which including spec definition, modeling, schematic design, pre/post-layout simulation, and IP bench characterization.
3. Layout design and support. Layout optimizations for high speed or high performance directly.
4. Supporting interface verifications between analog and digital.
5. Work closely with other teams for system level issues in CPU projects.
? Qualifications
Education and Experience
1. Bachelor or above with 10+ years of experience in analog/mixed-signal design
2. Experience in finfet process ( 28nm and below ) is a must
3. Experience of design in the following analog IP will be a plus: PLL, IO, clock control, ldo, ad/da, thermal, temp sensor, CPR, pcie, sata, usb
Skills and Knowledge
1. Cadence analog design flow
2. Cadence/Synopsys characterization flow
3. Team build, management, communication and presentation skill
Position Description
On this position, you will participate in & lead a team of highly competent Analog designers involved in design, verification, and implementation of advanced platform for HXT's future generation server CPU products.
? Location
Shanghai
? Responsibilities
1. Lead team members to design analog macros independently.
2. Analog/Mixed-signal IP design which including spec definition, modeling, schematic design, pre/post-layout simulation, and IP bench characterization.
3. Layout design and support. Layout optimizations for high speed or high performance directly.
4. Supporting interface verifications between analog and digital.
5. Work closely with other teams for system level issues in CPU projects.
? Qualifications
Education and Experience
1. Bachelor or above with 10+ years of experience in analog/mixed-signal design
2. Experience in finfet process ( 28nm and below ) is a must
3. Experience of design in the following analog IP will be a plus: PLL, IO, clock control, ldo, ad/da, thermal, temp sensor, CPR, pcie, sata, usb
Skills and Knowledge
1. Cadence analog design flow
2. Cadence/Synopsys characterization flow
3. Team build, management, communication and presentation skill
职能类别: 集成电路IC设计/应用工程师
公司介绍
贵州华芯通半导体有限公司
贵州华芯通半导体技术公司由贵州省及美国高通公司共同出资成立,注册地为贵州贵安新区,在北京、上海和贵安新区设有研发运营机构。贵州华芯通半导体专注于设计、开发并销售供中国境内使用的先进服务器芯片。华芯通半导体技术有限公司的成立有助于推动中国集成电路产业发展、提升中国芯片产业开发及设计能力,以及推动并实现中国“强芯梦”。
华芯通半导体2017校园招聘网申地址 http://campus.51job.com/hxt 我们期待你的加入!
贵州华芯通半导体技术公司由贵州省及美国高通公司共同出资成立,注册地为贵州贵安新区,在北京、上海和贵安新区设有研发运营机构。贵州华芯通半导体专注于设计、开发并销售供中国境内使用的先进服务器芯片。华芯通半导体技术有限公司的成立有助于推动中国集成电路产业发展、提升中国芯片产业开发及设计能力,以及推动并实现中国“强芯梦”。
华芯通半导体2017校园招聘网申地址 http://campus.51job.com/hxt 我们期待你的加入!
联系方式
- 公司地址:地址:span贵安新区