北京招聘

职位描述：
Job Overview
We are seeking cache design engineers to develop the next generation of Huaxintong's industry-leading custom ARM-compatible CPUs. Individuals in this team will be involved in all phases of product development, from proving-out initial high-level concepts down to modeling the bits of individual registers. We need engineers who can help us design and implement cache and cache coherency. In this team, individuals will work with performance modeling team and verification team to design the L3 cache of the Huaxintong's next generation custom CPU. Use Hardware Description Language to design models of the coherence system. Employ synthesis, STA and power tools to achieve improve performance with reasonable overhead.

Minimum Qualifications
We are looking for individuals that have 3+ years’ experience or equivalent education in the following areas:

1. Good understanding of RISC and CPU architecture.
2. Achieve improve performance with reasonable microarchitecture.
3. Work with verification team and integration team
4. High performance logic design techniques Familiar withHDL and behavior modeling
5. Experience with simulation and design flow, such as lint, CDC, synthesis, STA, floorplan and etc.

Preferred Qualifications

Additional skills in the following areas are a plus:
1. Industry experience in a specific high performance CPU design.
2. Experience with coherence protocol implementation, such as ACE, CHI/CHIE.
3. Experience with cache system design.
4. Knowledge of verification and good communication skill with verification team

Education Requirements
Required: Master’s, Electronic Engineering and/or Computer Science
Preferred: Doctorate, Electronic Engineering and/or Computer Science or equivalent experience.

贵州华芯通半导体有限公司

贵州华芯通半导体技术公司由贵州省及美国高通公司共同出资成立，注册地为贵州贵安新区，在北京、上海和贵安新区设有研发运营机构。贵州华芯通半导体专注于设计、开发并销售供中国境内使用的先进服务器芯片。华芯通半导体技术有限公司的成立有助于推动中国集成电路产业发展、提升中国芯片产业开发及设计能力，以及推动并实现中国“强芯梦”。

华芯通半导体2017校园招聘网申地址 http://campus.51job.com/hxt 我们期待你的加入！