北京招聘

职位描述：
简历投递：xpzhang@marvell.com
简历主题：姓名-学校-专业-意向职位
地址：上海市浦东区科苑路399号4幢
部门：Datacom R&D

Position Details
Candidates will be involved in the whole ASIC design flow from RTL coding through P&R support, which includes logic design, DFT planning and implementation, logic synthesis, power optimization, static timing analysis and sign-off. Candidates will also work closely with analog design teams on IP integration, with P&R engineers on chip floor planning and timing optimization, and with product/test engineers on ATE tests.

Job Description - Duties & Responsibilities:
? Participate in SOHO switch development, such as
? RTL implementation base on design specification;
? Setup and maintain frontend flow, e.g. Lint, CDC, LEC and Synthesis;
? Co-work with verification/validation team on design failure;
? Co-work with backend team on timing closures and P&R;
? Design document writing and maintain.

Required Education, Knowledge, Skills & Abilities:
? Enrolled in the master's degree course related to ASIC development
? Experience with digital design, running EDA tools of simulation and running frontend flow
? Good communication skills and willing to learn 举报 分享

We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

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