Design Verification Engineer
美满电子科技(Marvell)
- 公司规模:500-1000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2017-06-20
- 工作地点:北京-海淀区
- 招聘人数:若干人
- 学历要求:本科
- 职位类别:集成电路IC设计/应用工程师
职位描述
职位描述:
Job Title Design Verification Engineer
Business Unit Central Engineering
Location Beijing
Job Description
ASIC design verification engineer responsible for the verification and evaluation of digital circuits
in high-speed data communication ICs. The candidate will be involved in verification plan
development, test environment setup, modeling, testcase development and execution. He/She
will be responsible for block and /or chip level verification.
Job Requirement
MS in EE or CE with VLSI emphasis. Graduate from reputable university with competitive GPA or
class ranking. Graduate course work in VLSI design, digital circuit theory, logic design or
computer architecture. Exposure to graduate school projects in ASIC design or verification.
Must be proficient in the following skills:
? Fundamental concepts in digital logic design
? Understand ASIC verification flows and methodologies
? Verilog and SystemVerilog/SystemC/Vera
? Strong Perl and Tcl scripting
? UNIX Shell scripting (Csh, Bash)
Highly desirable skills:
? Formal verification
? Low power design
? MATLAB and C/C++ based system simulation and evaluation
? DSP function hardware implementation knowledge
Good personal communication skills and team working spirit. Hardworking and motivated to be part of a highly competent design team.
Travel Requirement 5%-10%
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Job Title Design Verification Engineer
Business Unit Central Engineering
Location Beijing
Job Description
ASIC design verification engineer responsible for the verification and evaluation of digital circuits
in high-speed data communication ICs. The candidate will be involved in verification plan
development, test environment setup, modeling, testcase development and execution. He/She
will be responsible for block and /or chip level verification.
Job Requirement
MS in EE or CE with VLSI emphasis. Graduate from reputable university with competitive GPA or
class ranking. Graduate course work in VLSI design, digital circuit theory, logic design or
computer architecture. Exposure to graduate school projects in ASIC design or verification.
Must be proficient in the following skills:
? Fundamental concepts in digital logic design
? Understand ASIC verification flows and methodologies
? Verilog and SystemVerilog/SystemC/Vera
? Strong Perl and Tcl scripting
? UNIX Shell scripting (Csh, Bash)
Highly desirable skills:
? Formal verification
? Low power design
? MATLAB and C/C++ based system simulation and evaluation
? DSP function hardware implementation knowledge
Good personal communication skills and team working spirit. Hardworking and motivated to be part of a highly competent design team.
Travel Requirement 5%-10%
职能类别: 集成电路IC设计/应用工程师
公司介绍
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.
Website: **********************
Website: **********************
联系方式
- Email:jiangrr@marvell.com
- 公司地址:地址:span安德门大街57号(楚翘城)7幢3层