Verification Engineer
恩智浦(中国)管理有限公司
- 公司规模:10000人以上
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2017-05-03
- 工作地点:北京-朝阳区
- 招聘人数:若干人
- 职位类别:集成电路IC设计/应用工程师
职位描述
职位描述:
Job Opportunity: Seeking highly motivated, energetic, ‘walk the talk’ attitude Tech Lead willing to take the challenge of delivering the first pass success of complex microcontroller based SoCs and IPs using the latest advanced verification languages and methodology.
The Verification Lead would be working with experienced SoC team to address the verification challenges in the context of the Module/Subsystem/SoC /System Level Verification through the use of simulation, hardware modeling, formal verification and active participation in pre/post silicon validation.
Key Responsibilities
? Evaluate and deploy the evolving verification methodologies to handle increasingly complex SoC/IP designs within aggressive, market-driven schedules.
? Ensure quality adherence during all stages of the project life cycle. Also carry out a thorough analysis of existing processes and recommend and implement the process improvements to ensure ‘Zero Defect’ chips
? Ability to think differently, encouraging and influencing technological innovations in the team
? Ability to work well as part of a team both locally, and also with remote or multi-site teams
Key Skills
? Self-starter with 10-15 years of experience on SOC/Chip level/Cluster/IP verification on multimillion Gate and complex Design with multiple clocks and power domains with minimal supervision
? Experience and hands on working with C and UVM/System Verilog based Test environment, HDLs (Verilog/VHDL),PLI/DPI, simulators (IUS/Questa/VCS) is a MUST
? Coverage driven Verification for addressing Functional, Performance requirement of the SoC
? Understanding of the design/architecture and ability to debug RTL/Gate netlist
? Experience in microcontroller architecture, Cores ARM A/M/R series, Interconnect(NIC, FlexNoC), Cache Coherency, Protocols like AHB/AMBA,AXI, ACE, OCP, Memory(Flash, SRAM,DDR3/4) and memory controllers
? Experience in automotive protocols like LIN, CAN, Flex, Graphics/Multimedia/Networking protocols like PCIe, MIPI, GPU, H.264, Ethernet, USB, ITU T.656, DSP, Image/RADAR processing would be an advantage
? Exposure to formal verification Apps, PinMuxing Verification, Assertions/SVA/AVIP, functional coverage, Gate level simulations, verification planning, coverage closure and regression management
? Experience in Low power verification using CPF/UPF
? Automation of verification collateral using scripts in Perl, Python
? Exposure to pre silicon validation/emulation (Palladium, Zebu)/FPGA Prototyping would be a big advantage
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Job Opportunity: Seeking highly motivated, energetic, ‘walk the talk’ attitude Tech Lead willing to take the challenge of delivering the first pass success of complex microcontroller based SoCs and IPs using the latest advanced verification languages and methodology.
The Verification Lead would be working with experienced SoC team to address the verification challenges in the context of the Module/Subsystem/SoC /System Level Verification through the use of simulation, hardware modeling, formal verification and active participation in pre/post silicon validation.
Key Responsibilities
? Evaluate and deploy the evolving verification methodologies to handle increasingly complex SoC/IP designs within aggressive, market-driven schedules.
? Ensure quality adherence during all stages of the project life cycle. Also carry out a thorough analysis of existing processes and recommend and implement the process improvements to ensure ‘Zero Defect’ chips
? Ability to think differently, encouraging and influencing technological innovations in the team
? Ability to work well as part of a team both locally, and also with remote or multi-site teams
Key Skills
? Self-starter with 10-15 years of experience on SOC/Chip level/Cluster/IP verification on multimillion Gate and complex Design with multiple clocks and power domains with minimal supervision
? Experience and hands on working with C and UVM/System Verilog based Test environment, HDLs (Verilog/VHDL),PLI/DPI, simulators (IUS/Questa/VCS) is a MUST
? Coverage driven Verification for addressing Functional, Performance requirement of the SoC
? Understanding of the design/architecture and ability to debug RTL/Gate netlist
? Experience in microcontroller architecture, Cores ARM A/M/R series, Interconnect(NIC, FlexNoC), Cache Coherency, Protocols like AHB/AMBA,AXI, ACE, OCP, Memory(Flash, SRAM,DDR3/4) and memory controllers
? Experience in automotive protocols like LIN, CAN, Flex, Graphics/Multimedia/Networking protocols like PCIe, MIPI, GPU, H.264, Ethernet, USB, ITU T.656, DSP, Image/RADAR processing would be an advantage
? Exposure to formal verification Apps, PinMuxing Verification, Assertions/SVA/AVIP, functional coverage, Gate level simulations, verification planning, coverage closure and regression management
? Experience in Low power verification using CPF/UPF
? Automation of verification collateral using scripts in Perl, Python
? Exposure to pre silicon validation/emulation (Palladium, Zebu)/FPGA Prototyping would be a big advantage
职能类别: 集成电路IC设计/应用工程师
公司介绍
NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has over 29,000 employees in more than 30 countries and posted revenue of $8.88 billion in 2019.
联系方式
- Email:fiona.chen@nxp.com
- 公司地址:西青开发区兴华路15号