2017校招_Analog/Mixed Signal Design Engineer
恩智浦(中国)管理有限公司
- 公司规模:10000人以上
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2017-04-20
- 工作地点:苏州
- 招聘人数:若干人
- 工作经验:无工作经验
- 学历要求:本科
- 职位月薪:1-1.5万/月
- 职位类别:集成电路IC设计/应用工程师
职位描述
职位描述:
Responsibilities:
1. Responsible for analog / mixed-signal IP design for MCU product development。
2. Independent IP schematic design / analog & mix-signal simulation/ layout design / IP view generation / technical documentation。
3. Work with SoC / Backend team on IP integration.
4. Work with test/validation/qualification team on IP validation, characterizations and failure analysis.
Requirements:
1. Master Degree in Electrical or Computer Engineering.
2. Familiar with analog/mix-signal IC schematic and layout design
3. Familiar with design EDA tool: Hspice/Spectre, Virtuso, Calibre, Assura, QRC;
4. Familiar with lab equipments and silicon validation /debug flow
5. Experience in power management module design ( high accuracy bandgap /LDO/DC-DC/…) is a plus
6. Experience in data conversion module design ( ADC/DAC) is a plus
7. Experience in clock generation module design ( crystal osc/ relaxation osc/ /PLL/FLL/..) is a plus
8. Experience with mix-signal circuit modeling & simulation is a plus
9. Good communication skills and team work
10. Good oral and written English skills
举报
分享
Responsibilities:
1. Responsible for analog / mixed-signal IP design for MCU product development。
2. Independent IP schematic design / analog & mix-signal simulation/ layout design / IP view generation / technical documentation。
3. Work with SoC / Backend team on IP integration.
4. Work with test/validation/qualification team on IP validation, characterizations and failure analysis.
Requirements:
1. Master Degree in Electrical or Computer Engineering.
2. Familiar with analog/mix-signal IC schematic and layout design
3. Familiar with design EDA tool: Hspice/Spectre, Virtuso, Calibre, Assura, QRC;
4. Familiar with lab equipments and silicon validation /debug flow
5. Experience in power management module design ( high accuracy bandgap /LDO/DC-DC/…) is a plus
6. Experience in data conversion module design ( ADC/DAC) is a plus
7. Experience in clock generation module design ( crystal osc/ relaxation osc/ /PLL/FLL/..) is a plus
8. Experience with mix-signal circuit modeling & simulation is a plus
9. Good communication skills and team work
10. Good oral and written English skills
职能类别: 集成电路IC设计/应用工程师
公司介绍
NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has over 29,000 employees in more than 30 countries and posted revenue of $8.88 billion in 2019.
联系方式
- Email:fiona.chen@nxp.com
- 公司地址:西青开发区兴华路15号