SOC Design Verification Manager (职位编号:MM)
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2017-01-02
- 工作地点:北京
- 招聘人数:若干人
- 职位类别:信息技术经理/主管
职位描述
职位描述:
SOC Design Verification Manager
RESPONSIBILITIES:
? Lead a team and perform project planning, estimation, tracking, mentoring, reviews, etc.
? Plan and conduct reviews and work with other NBIO groups
? Ensure that metrics are established to measure the IP quality
? Evaluation/review of all new or existing methods, comparing them to established procedures and standards both technical and non-technical and champion where applicable
? Plan and conduct test centric Post Mortem evaluation/review
? Develop and implement design quality control and improvement processes
? Constantly look to improve design productivity
? Leading the Team's development of leading edge innovative IP level features
? Manage staff career development, goal planning and day-to-day problem resolution
? Hands-on resolution of problems and priority calls
? Carry milestone definition on complex ASIC/SoC designs - management of "gate" criteria
? Represent the team in the AMD engineering community
? Experience with industry standard protocols and interfaces such as AXI4, ACE-lite and/or PIPE
? Resolve complex problems involving:
o advanced static timing analysis and formal verification
o RTL Linting and CDC checking
o ASIC/SoC Design flows and methodology implementations and enhancements
o IP/sub-system/SoC problems
REQUIREMENTS:
? 10+ years professional experience including SOC/PCIe/Fabrics/MMU Design
? Communication skills: excellent oral, written and presentation skills
? Leadership experience in productivity improvement
? Familiar with aspects of IP Design Goals and Milestones
? Working knowledge of Verilog, System Verilog, C/C++, Perl/Python
? Good understanding of PCIe, Hyper-Transport (HT) protocols
? At least 3 years of management experience with proven record of dealing with hiring, performance management and coaching of employees
? Chipset and Fusion architecture and design knowledge (Northbridge, FCH, DDR Interface, Memory controllers)
? DFT, Debug knowledge
? Self-starter and quick learner and able to achieve successful outcomes in a non-hierarchical environment, with minimal supervision or direction
? Detail oriented; ability to multitask through planning/organizing
? Project management skills and experience
EDUCATION:
? University graduate (BE/BTECH/MTECH) in Electronics or Computer engineering
举报
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SOC Design Verification Manager
RESPONSIBILITIES:
? Lead a team and perform project planning, estimation, tracking, mentoring, reviews, etc.
? Plan and conduct reviews and work with other NBIO groups
? Ensure that metrics are established to measure the IP quality
? Evaluation/review of all new or existing methods, comparing them to established procedures and standards both technical and non-technical and champion where applicable
? Plan and conduct test centric Post Mortem evaluation/review
? Develop and implement design quality control and improvement processes
? Constantly look to improve design productivity
? Leading the Team's development of leading edge innovative IP level features
? Manage staff career development, goal planning and day-to-day problem resolution
? Hands-on resolution of problems and priority calls
? Carry milestone definition on complex ASIC/SoC designs - management of "gate" criteria
? Represent the team in the AMD engineering community
? Experience with industry standard protocols and interfaces such as AXI4, ACE-lite and/or PIPE
? Resolve complex problems involving:
o advanced static timing analysis and formal verification
o RTL Linting and CDC checking
o ASIC/SoC Design flows and methodology implementations and enhancements
o IP/sub-system/SoC problems
REQUIREMENTS:
? 10+ years professional experience including SOC/PCIe/Fabrics/MMU Design
? Communication skills: excellent oral, written and presentation skills
? Leadership experience in productivity improvement
? Familiar with aspects of IP Design Goals and Milestones
? Working knowledge of Verilog, System Verilog, C/C++, Perl/Python
? Good understanding of PCIe, Hyper-Transport (HT) protocols
? At least 3 years of management experience with proven record of dealing with hiring, performance management and coaching of employees
? Chipset and Fusion architecture and design knowledge (Northbridge, FCH, DDR Interface, Memory controllers)
? DFT, Debug knowledge
? Self-starter and quick learner and able to achieve successful outcomes in a non-hierarchical environment, with minimal supervision or direction
? Detail oriented; ability to multitask through planning/organizing
? Project management skills and experience
EDUCATION:
? University graduate (BE/BTECH/MTECH) in Electronics or Computer engineering
职能类别: 信息技术经理/主管
公司介绍
AMD公司成立于1969年,总部位于美国加利福尼亚州桑尼维尔。AMD(NYSE: AMD)是一家创新的科技公司,致力于与客户及合作伙伴紧密合作,开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球,拥有约为12000名员工。
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦