Packaging R&D Engineer(职位编号:11780757)
飞思卡尔半导体(中国)有限公司上海分公司
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2012-08-20
- 工作地点:天津
- 招聘人数:若干
- 工作经验:二年以上
- 学历要求:硕士
- 语言要求:英语熟练
- 职位类别:装配工程师/技师 工程/设备工程师
职位描述
Description
:
Company Introduction:
Freescale Tianjin Final Manufacturing
Established in 1992, Tianjin Final Manufacturing is one of two Freescale-owned mega-sites for testing and packaging chips, with a floor space of 14,660 square meters.
The operation ships more than nine million microcontroller, mixed-signal and radio frequency devices per week.
Customers include Motorola’s Personal Communications Sector and a number of other consumer and automotive electronics vendors.
Tianjin Final Manufacturing is home to Freescale’s latest integrated circuit (IC) packaging solution, the power quad flat no-lead (PQFN), targeted for automotive and other high-current, high-power applications.
Other key packaging technologies include multiple array process ball grid array (MAPBGA), quad flat pack no-lead (QFN), small outline integrated circuit (SOIC), thin quad flat pack (LQFP), plastic dual in-line pin (PDIP), shrink dual in-line pin (SDIP), and RF components.
Description:
Will be focusing on IC (integrated circuit) packaging Wafer Dicing and Die Bond technology research and development, work with global team to finish development projects and other tasks as listed below:
New packaging technology development
New package related process development
Advanced material interface study
Advanced IC package failure analysis
Understand requirement from internal stakeholders and external customers and create/align project scope
Qualifications
: Master is preferred or bachelor degree with at least 2 years experience in packaging industry.
Intention and capability to work in a cross-functional/global team environment
Experience in R&D work of packaging technology
Experience in material analysis
Experience in coordinate/lead development project independently
Excellent English communication skill
:
Company Introduction:
Freescale Tianjin Final Manufacturing
Established in 1992, Tianjin Final Manufacturing is one of two Freescale-owned mega-sites for testing and packaging chips, with a floor space of 14,660 square meters.
The operation ships more than nine million microcontroller, mixed-signal and radio frequency devices per week.
Customers include Motorola’s Personal Communications Sector and a number of other consumer and automotive electronics vendors.
Tianjin Final Manufacturing is home to Freescale’s latest integrated circuit (IC) packaging solution, the power quad flat no-lead (PQFN), targeted for automotive and other high-current, high-power applications.
Other key packaging technologies include multiple array process ball grid array (MAPBGA), quad flat pack no-lead (QFN), small outline integrated circuit (SOIC), thin quad flat pack (LQFP), plastic dual in-line pin (PDIP), shrink dual in-line pin (SDIP), and RF components.
Description:
Will be focusing on IC (integrated circuit) packaging Wafer Dicing and Die Bond technology research and development, work with global team to finish development projects and other tasks as listed below:
New packaging technology development
New package related process development
Advanced material interface study
Advanced IC package failure analysis
Understand requirement from internal stakeholders and external customers and create/align project scope
Qualifications
: Master is preferred or bachelor degree with at least 2 years experience in packaging industry.
Intention and capability to work in a cross-functional/global team environment
Experience in R&D work of packaging technology
Experience in material analysis
Experience in coordinate/lead development project independently
Excellent English communication skill
公司介绍
恩智浦半导体(纳斯达克代码:NXPI)致力于通过先进的安全连结及基础设施解决方案为人们更智慧安全、轻松便捷的生活保驾护航。作为全球领先的嵌入式应用安全连接解决方案领导者,恩智浦不断推动着互联汽车、端对端安全及隐私、智能互联解决方案市场的创新。恩智浦拥有超过60年的专业技术及经验,拥有29,000名员工,业务遍及30多个国家,2019年的营业额达88.8亿美元。